Hi all,
I’ve a problem with the jdm programmer, the voltage between Vss and MCLR# seems to be on the low side.
After I received my pcb from mike I started stuffing the jdm-board. After playing with that multimeterthingy I found these value’s.
“Click on “Enable MCLR”, measure voltage between Vss (Pin 12/31) and MCLR# (Pin 1) : ca. 14 Vâ€
Reading: 12,60
“Click on “Enable Vcc”, measure voltage between Vss (Pin 12/31) and Vdd (Pin 11/32): ca. 5 V “
Reading: 4,73
“Click on “Enable clock”, measure voltage between Vss (Pin 12/31) and RB6 (Pin 39): ca. 5 V +/- 1 V“
Reading :5,52
“Click on “Enable Data Out”, measure voltage between Vss (Pin 12/31) and RB7 (Pin 40): ca 5 V +/- 0.5 V “
Reading: 4,24
Al the voltages seem to be stable, so there is no leak or something. Does anyone know what is wrong?
Thnx ,