I try to send value to the TI chip pga4311, it works like the aout module so I only change the aout.inc file… And it doesn’t work (the pga4311 seems to be in mute mode, it doesn’t received the right value).
here’s the code :
#define PGA_LAT_CS LATC ; The chip select pin CS#
#define PGA_TRIS_CS TRISC ; is connected to Port C.5
#define PGA_PIN_CS 5 ; (CANNOT be shared with other outputs!)
;
#define PGA_LAT_DIN LATC ; The data input pin DIN
#define PGA_TRIS_DIN TRISC ; is connected to Port C.4
#define PGA_PIN_DIN 4 ; (can be shared with other outputs)
;
#define PGA_LAT_SCLK LATD ; The shift clock input pin SCLK
#define PGA_TRIS_SCLK TRISD ; is connected to Port D.3
#define PGA_PIN_SCLK 3 ; (can be shared with other outputs)
;
; Number of connected MAX525
;
#define PGA_NUMBER_OF_CHANNEL 4 ; either PGA2310, PGA2311 or PGA4311
; ; -> makes 8 Channel
;
; ==========================================================================
;
; Copyright (C) 2003 Thorsten Klose (Thorsten.Klose@gmx.de)
;
; ==========================================================================
;
; This file is part of an MIOS example application
;
; This application is free software; you can redistribute it and/or modify
; it under the terms of the GNU General Public License as published by
; the Free Software Foundation; either version 2 of the License, or
; (at your option) any later version.
;
; This application is distributed in the hope that it will be useful,
; but WITHOUT ANY WARRANTY; without even the implied warranty of
; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
; GNU General Public License for more details.
;
; You should have received a copy of the GNU General Public License
; along with this application; if not, write to the Free Software
; Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
;
; ==========================================================================
PGA_Init
;; enable pin drivers
bcf PGA_TRIS_CS, PGA_PIN_CS
bcf PGA_TRIS_DIN, PGA_PIN_DIN
bcf PGA_TRIS_SCLK, PGA_PIN_SCLK
;; --------------------------------------------------------------------------
;; FUNCTION: PGA_SEND_GAIN
;; DESCRIPTION: This function set for all channel (CHANNEL_GAIN_0 to CHANNEL_GAIN_7)
;; IN: o gain value in CHANNEL_GAIN_0 to CHANNEL_GAIN_7
;; OUT: -
;; USES: BSR --- PGA_SR contains unknown values after the load procedure
;; --------------------------------------------------------------------------
PGA_SEND_GAIN
IRQ_DISABLE ; disable interrupts
;; (for the case that interrupt driven pins are used)
bcf PGA_LAT_CS, PGA_PIN_CS ; activate chip select
bcf PGA_LAT_SCLK, PGA_PIN_SCLK ; clear clock
movlw PGA_NUMBER_OF_CHANNEL-1 ; init outer loop counter
movwf PGA_SR_CTR
PGA_LoadSR_OuterLoop
clrf PGA_SR_BIT_CTR ; clear inner loop counter
;; pointer = current pga channel
lfsr FSR0, CHANNEL_GAIN_0
movlw PGA_NUMBER_OF_CHANNEL
subfwb PGA_SR_CTR, W
addwf FSR0L, F
movff INDF0, PGA_SR
PGA_LoadSR_Value
PGA_LoadSR_Value_Loop
bcf PGA_LAT_DIN, PGA_PIN_DIN ; set DIN depending on current MSB
btfsc PGA_SR, 7
bsf PGA_LAT_DIN, PGA_PIN_DIN
rlf PGA_SR, F ; start to shift the 8-bit value
bsf PGA_LAT_SCLK, PGA_PIN_SCLK ; rising clock edge
nop
bcf PGA_LAT_SCLK, PGA_PIN_SCLK ; falling clock edge
incf PGA_SR_BIT_CTR, F ; loop 8 times
btfsc PGA_SR_BIT_CTR, 3
rgoto PGA_LoadSR_Value_Loop
PGA_LoadSR_Next
;; loop until last register reached
decf PGA_SR_CTR, F
bc PGA_LoadSR_OuterLoop
bsf PGA_LAT_CS, PGA_PIN_CS ; deactivate chip select
IRQ_ENABLE ; enable interrupts again
return
thanks!