encoder mapping within different shift registers

MIOS programming (C)
1

hey guys,

i´ve come across a problem with my encoder mapping of which i am not sure if i could solve it within the c application of mb64e.

I´ve got two rows of 6 encoders, let´s name them A and B. Due to practical reasons (cable mess) i would like to wire the encoders in blocks of 4 (encoder 1 and 2 of row A and row B) with one 10 pin ribbon

cable each block and connect them to SR5, SR6 and SR7 of my second DIN-Module. So far so good.

Normally when mapping encoders they get increasing cc numbers with increasing shift register numbers. That means that the encoders of SR 5 get the numbers 1,2,3 and 4 and the encoders of SR6 get 5,6,7,8 and so on.

But due to my wiring the encoders in row A have 1 2 5 6 9 10 and the encoders in row b have 3 4 7 8 11 12 instead of 1,2,3,4,5,6 and 7,8,9,10,11,12.

Question: Can i change this within the c application or is that not possible?

Thank you,

alex
20100614-rb2eadtnn59i3b7uhhf7p6224x.jpg

2

Hi,

thats easy, as encoder pinnings are defined in a table:

From http://www.ucapps.de/mios_c_send_enc_abs7.html

MIOS_ENC_TABLE {
// sr pin mode
MIOS_ENC_ENTRY( 1, 0, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 1
MIOS_ENC_ENTRY( 1, 2, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 2
MIOS_ENC_ENTRY( 1, 4, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 3
MIOS_ENC_ENTRY( 1, 6, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 4
MIOS_ENC_ENTRY( 2, 0, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 5
MIOS_ENC_ENTRY( 2, 2, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 6
MIOS_ENC_ENTRY( 2, 4, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 7
MIOS_ENC_ENTRY( 2, 6, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 8

MIOS_ENC_EOT
};
[/code]




your table (that you unfortunately forgot to post here - it would simplify things) has probably following entries:
[code]  
  
MIOS\_ENC\_TABLE {  
 // sr pin mode  
 MIOS\_ENC\_ENTRY( 5, 0, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 1  
 MIOS\_ENC\_ENTRY( 5, 2, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 2  
 MIOS\_ENC\_ENTRY( 5, 4, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 3  
 MIOS\_ENC\_ENTRY( 5, 6, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 4  
 MIOS\_ENC\_ENTRY( 6, 0, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 5  
 MIOS\_ENC\_ENTRY( 6, 2, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 6  
 MIOS\_ENC\_ENTRY( 6, 4, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 7  
 MIOS\_ENC\_ENTRY( 6, 6, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 8  
 MIOS\_ENC\_ENTRY( 7, 0, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 9  
 MIOS\_ENC\_ENTRY( 7, 2, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 10  
 MIOS\_ENC\_ENTRY( 7, 4, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 11  
 MIOS\_ENC\_ENTRY( 7, 6, MIOS\_ENC\_MODE\_NON\_DETENTED), // V-Pot 12  
  
 MIOS\_ENC\_EOT  
};

You want to map 1->1 2->2 5->3 6->4 9->5 10->6 3->7 4->8 7->9 8->10 11->11 12->12 Accordingly you have to swap some table entries:

MIOS_ENC_TABLE {
// sr pin mode
MIOS_ENC_ENTRY( 5, 0, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 1
MIOS_ENC_ENTRY( 5, 2, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 2
MIOS_ENC_ENTRY( 6, 0, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 5 -> now 3
MIOS_ENC_ENTRY( 6, 2, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 6 -> now 4
MIOS_ENC_ENTRY( 7, 0, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 9 -> now 5
MIOS_ENC_ENTRY( 7, 2, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 10 -> now 6

MIOS_ENC_ENTRY( 5, 4, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 3 -> now 7
MIOS_ENC_ENTRY( 5, 6, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 4 -> now 8
MIOS_ENC_ENTRY( 6, 4, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 7 -> now 9
MIOS_ENC_ENTRY( 6, 6, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 8 -> now 10
MIOS_ENC_ENTRY( 7, 4, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 11
MIOS_ENC_ENTRY( 7, 6, MIOS_ENC_MODE_NON_DETENTED), // V-Pot 12

MIOS_ENC_EOT
};
[/code]









hope this makes sense







Best Regards, Thorsten.
3

hope this makes sense

Best Regards, Thorsten.

Thorsten,

thank you. Makes sense. I wasnt aware of the fact, that

the order of the entries has an effect on the mapping.

Now that i see that i can even swap the SRs in the list and not

only the numbers within a specific SR entry it is

totally clear.

Best,

Alex