the pattern of 0, 3, 4, and 7 is very strange.. if you are using the current posted AIN module it translates to the first, last and two center pins of each and every connector.
Odd..
I am going to amend something and say that rather than checking at the header pins, pull the chips and check at the chip socket.
So, clip to the postive (or negative) with one lead and stick a wire into the socket hole and clip the other lead, then do a pot sweep.
I once had a problem with a pic where it refused to read my inputs (on another project) I fought with it for days.
Turns out there as a manufacturing defect in the cheap socket and the metal tabs inside the socket were flatened in some pins and never even touched the pic pins!
So, check at the socket with the chip out. Alternatively you could check with the chip in by touching on top of the pin lead, but you need some dexterity to manage both holding the probe and turning the knob.
you need to look for something that could be repeated for each chip and on each AIN board module. Solder joints is unlikely since you have the same set not working on each input chip, and on each board. So, what is the repeated mistake or (more likely) defect?
Is it possible that you got a bad batch of input chips where a sequence of bad ADCs was repeated for several chips? Highly unlikely, but ceck the make dates on the chips. If they are all different, then you are not using parts all from one batch.
Is it possible you have a batch of bad sockets? You can confim that by checking the pot resistance with the module unpluged while the chips are installed, as described above. Note that if you check the socket chip out, you are not testing that the pot is ACTUALLY connected to the chip. You can only verify this chip in.
Is it possible that there is a miss connection between the boards and core? Well, not with the chip select, since you get ‘some’ data from ALL chips. The other possability is with the ABC lines. These set various combinations to form an ‘address’ to read each input. The work with the chart proves that there is no logical correlation of one wire not working while the other two are fine. Further, if it was not, you would get all sorts of bad data. Exampled by not just “pot works or not” but missread values. A bad address line would cause it to ‘read the wrong pot’
Is it possible that the PIC itself has something going on with the outputs for the ABC lines or analog in lines? Well, a problem with the Ainput line would mean that EVERY pot on the assoicated chip would not read. So, if you had whole banks of pots go out, then yes. In your case you get some pot values from each chip, so no on that question. What about the ABC lines? Same situation as above.