i just started to mound my first sid module and on i have a doubt about the 10 k resistor R1
on the schematics found on the ucapps’s site, says that is not required anymore, but i have this part in my kit and on the pcb are the last holes available
so what should i do?
and if is not required anymore, should i make a bridge?
let me know..
and if is not required anymore, should i make a bridge?
No, don’t make a bridge. Just leave it out like mentioned in the schematics.
well, i did the optimized board ,
using mios studio, i uploaded the mios1.8 and mbsid 1.7a
but no sound comes from the sid
from the pin 5 of the sid, i left the 10k resistor out, but now in this way i’m not connected to
to pin number 5 of IC2
i did something wrong?
no sound rom my sid:
i did the optimized psu board 4xsid, even if at the moment i’m using only 1 sid with minimal configuration, no display or encoder,
i’m sending 5vdc to the core module
and 12vac to the sid
pin 5 (res#) of the sid is not connected to the 10 k resistor and to pin o5 of the ic2
mios 1.8 is already uploaded(“upload process complete”)
and the main.hex and sertup_6581_without_cs.hex fof the mbsid 1.7a too
or i think so
i used mios studio
i also tryed the interconnection test
but the only message that i get is "upload process complete
how can i fix this problem?
HI!
i’m no able to get any sound from the sid and i don’t understand if everything i did was right
how the interconnection test works?
i mean, if i use mios studio
wich files i have to upload?
how can i understand if the mios 1.8 and the mbsid 1.7a are already uploaded in my modules?
why i’m so dumb?
No. Just leave R1 out as raphael said.
/offe
well, i did the optimized board ,
What is the optimized board? Your own design?
from the pin 5 of the sid, i left the 10k resistor out, but now in this way i’m not connected to
to pin number 5 of IC2
Ehmm…, the connection from IC1:Pin5 to IC2:Pin5 should still be there. The resistor just connected these pins to +5V (Pullup) and can be left out. So just connect the two pins 5 and everything should be fine
Raphael
pin 5 (res#) of the sid is not connected to the 10 k resistor and to pin o5 of the ic2
Why a second thread?
As I told you in the other thread, the connection between IC1:5 and IC2:5 must remain.
Raphael
Your asking:
why i’m so dumb?
I don`t know. 
But posting the same problem in 3 threads isn`t clever. That’s for shure.
See your other threads:
Thanks, raphael!
You made a GOOD point there. Even beginners or people “almost there” should understand, forum is being watched by various people.
Even if Your question isn’t answered right away, don’t start new topic because of it (and if you feel neglected and your question is not answered, just post a follow up to remind us). Once you get an answer, you can be sure that topic is being watched - and even if you have a new nearly related problem, post it there.
Bye, Moebius
Just to be sure: Did you follow the instructions exactly for connecting the Sid module to the Core module? The reason I’m asking this is that I ignored reading up on the docs and ended up doing 1-1 connection the first time… 
tokyomatik: Can you be a bit more specific? Just saying “WHAT’S WRONG” and “i don’t understand if everything i did was right” doesn’t give the rest of us a clue. Have you checked http://www.ucapps.de/howto_debug_midi.html?
About the interconnection test, read up on main.asm, I think that’s where the docs for this app is. I’ve not used it, but if I were you, I’d start by checking all connections, then the url above. Do you get any feedback from the core (sysex messages)?
ehm …sorry guys, but i stayed all night long testing the connection with the tester and everything looks right
i tryed to upload the mios (i’m using mios studio but i also tryed with midi ox)on the pic within 2 seconds but i still receiving back this message on the mios studio in port monitor:
F0 00 00 7E 40 00 01 F7
that to me, means that only the bootloader is in the pic
now i would also try the Serge’s SysEx Loader,
but i also have another question
i did the optimized psu board x 4
but only one sid in my configuration
on the schemaics i saw that the 5vdc goes to j2 of the core but also to j2 of the sid
i did not this connection because this jumpers are already cooncted to j10 of the core
and testing the pins i get 5v
i thought that probably i was supposed to connect the 5vdc to j2(of the sid) only in the 4xsid configuration, but maybe i’m wrong…
well if i have to connect ic1:5 to ic2:5 leaving out the resistor, to me sound like a bridge
and raphael told me :No, don’t make a bridge. Just leave it out like mentioned in the schematics.
maybe i was not clear enough to explain but if i don’t put the resistor i still remain a couple of holes on the pcb
and to connect them i have to make a kind of bridge if i’m not wrong…
sorry but sometimes my english is so so
anyway thanx a lot guys
i will let you know in a while…
last question about ic1:5 and ic2:5, are these pins, supposed to receive 5v anyway??
last question about ic1:5 and ic2:5, are these pins, supposed to receive 5v anyway??
No. Once again: There is no connection to 5V. There is only a connection between theese two pins.
OK…thanks a lot again,
i will test everything again…
but i also have another question
i did the optimized psu board x 4
but only one sid in my configuration
on the schemaics i saw that the 5vdc goes to j2 of the core but also to j2 of the sid
i did not this connection because this jumpers are already cooncted to j10 of the core
and testing the pins i get 5v
i thought that probably i was supposed to connect the 5vdc to j2(of the sid) only in the 4xsid configuration, but maybe i’m wrong…
Thats OK. One 5V connection is enough.
last question about ic1:5 and ic2:5, are these pins, supposed to receive 5v anyway??
Wait a second… As far as I can tell from the SID module schematic, IC1:PIN5 connects to IC2:PIN2. In that case, you SHOULD leave R1 out. Otherwise you have to clarify, 'cus I’m not following you…
/offe