More changes to MBHC_IIC_MIDI

MIOS programming (Assembler)
1

Hi.

I am currently working on another mod to IIC_MIDI to make it into a DMX512 interface.

Using some hacked code from another pic16f88 based Parallel->DMX interface, I have made some progress although my lack of knowledge regarding PIC memory management is really causing me some headaches.

As I am using the IIC_MIDI to effectively buffer 255 channels of DMX it requires me to use all 4 gpr’s and I can’t quite get my head round bank switching and what is visible when in another bank.

I have configured a register (called DMX_CHANNEL) in gpr0 which temporarilly stores the current DMX channel that is being updated by the Core but when I SWITCH_FSR_UPPER to access the upper banks I seem to lose the DMX_CHANNEL register (I assume because it is in the lower banks?). Is there any way round this or alternatively another regsiter I can use that is visible across all banks (other than W)?

I don’t expect anybody to ‘spoon feed’ me but does anyone know of a good tutorial on this as I am really struggling to get my head round it. I have also looked at other turorials that say on certain PIC’s banks 1/3 and 2/4 are shared I assume this isn’t the case with the 16f88?

From re-reading the spec (again) am I right in thinking that if use registers 0x70-0x7f then these are shared across all banks???

Thanks

Phil

2

Try the ACCESS bank if you need it visible from all banks… Pretty sure the addresses you mentioned are in the access bank?

3

Try the ACCESS bank if you need it visible from all banks… Pretty sure the addresses you mentioned are in the access bank?

Maybe I won’t get much ‘proper’ work today but at least I am learning about PIC memory management…

Yes that works, 0x70-0x7f are the ACCESS bank and are as you say visible from all banks.

Thanks

Phil

4

groovy :slight_smile:

Hope it does the trick!