Since it turned out that KS0107/KS0108 based displays with 240x64 resolution are not available anymore, I’m thinking about an alternative way for controlling graphical LCDs without performance loss. It’s clear that this requires a second microcontroller, but on the other hand the total-costs of this solution are less than I payed for my high-performance Displaytech 64240A.
The “companion core” will be connected via Port J15 of the MIOS core module. The parallel bus interface works asynchronous (Request/Acknowledge line), will provide double data rate (8 bit during the request phase, 8 bit after the acknowledge phase), and will support read and write transactions. Up to 8 companions will be addressable in this way, and it depends on the implementation how much displays can be connected to a single companion.
However, MIOS will provide a generic bus protocol for this interface, and a 2nd layer protocol for graphical as well as for character displays. In this way, low-cost displays based on the polular T6963C can be connected to the MIOS core without performance loss, but also any other display - the companion core just has to process the protocol.
(Sidenote: not only displays can be connected in this way, but any device which requires fast data transfers)
Important: this is a concept, which I will possibly realize next year. I cannot guarantee that it will work yet! The purpose of this posting is just to inform you about a possible solution before you purchase overpriced KS0108 based displays at EBay or wherever.
Cool. Questions: So if we already have a seperated core to control the LCD, is it also possible to just bring that TV - idea back (normal data D0-D7 to PAL/NTSC)?
And to bring back another thread: Color display possible? But thats more a point for dreaming, I think (cause the *color* data has to be sent by the MIOS Core anyhow - monochrome color displays would be a little … … expensive…)
please consider also the Vertical Display Mode for T6963C. I could do a re-design of the MIDIbox UC based on the new companion core. Also, it would allow to use SRAM memory instead of I2C banksticks. I think it would be great if there was an officially approved interface and pinout for such memory intensive extensions of the MBHP concept.
