Thanks for the introduction, now I understand why you asked this question.
DMA (direct memory access - hope that’s what you mean) speeds up the whole thing for the uC doesn’t need to poll for empty registers and fill registers with new data to be sent. But I’m not quite sure about that =) Just a short hint would be great, I’ll dig into the topic myself if I find it interesting.
Welcome to the wikipedia generation! 
It will be hard for you to find an explicit answer in the internet, since a DMA peripheral is used for multiple purposes. There are differences between chip families and there are different usecases.
You probably know from your AVR history, that as long as the CPU handles a data transfer with the polling method, it would get frequently interrupted by interrupt service routines. As a result this reduces the bandwidth. Even interrupt based transfers can block each other, they lead to unwanted dependencies (-> complex, inflexible, intransparent, timing critical, hard to maintain code) and they reduce the performance of the main thread(s).
In the MIOS32 specific context you have to consider that functions are running in FreeRTOS based threads that are timespliced. By using a DMA (which you probably don’t known from AVR controllers) data transfers will be handled in background >>immediately<< w/o using the CPU. A CPU thread typically waits until the complete transfer (with a definable number of bytes) has been finished. While doing this it can be interrupted by other threads/ISRs - but the bandwidth won’t be affected.
I could help layouting or whatever you might need help for.
Nils is still our No#1 layout slave and deserves my full trust! 
Yes, I know, that sounds like a young guy trying to change the world
Your idea doesn’t sound so unusual to me. If you would know my applications better, you would know that the concepts are already available (e.g. search for MBNET and the appr. source codes - it exists for “low-cost” PICs and STM32), resp. that complete applications already exist. The reason why I don’t “sell” this as a “workstation concept” is just that I know that people would expect a bit more than just some programming experiments, but a complete “plug&play” infrastructure for cheap money, similar to Yamaha MLAN.
What I can already tell you: such a infrastructure will cost a lot of money (since multiple chips are involved), a lot of programming effort and at the end also chip resources (more flash/RAM memory for higher flexibility during runtime)
The art (and you will see this point in 10..20 years) is to create a simplified infrastructure which doesn’t support everything, but which makes most people and especially yourself happy, for as less money as possible with as less effort as possible.
But I don’t really want to reduce youthful enthusiasm - maybe you will find a clever solution which hasn’t been found by somebody else before by working on a high-level approach based on existing concepts, and/or just by ignoring any objections!
Best Regards, Thorsten.